Keynote Speakers

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  Yoshiaki Daimon Hagiwara

  Research field: ADC, DRAM and High-speed Cache SRAM Buffer Memory Chips, Micro Controller Chips, Semiconductor Chips for AIPS Robotics, Solar Cell Energy Solutions.

  Professor, Sojo University, Japan.

  Hagiwara graduated California Institute of Technology (Caltech) in Pasadena, California in USA with BS71 with honor, MS1972 and PhD1975 with the major in Electric Engineering and with the minor in Physics. In February1975, he joined Sony in Tokyo, Japan and was engaged first in the early development of Sony image sensors. While working for Sony from 1975 to 2008, he was engaged in the early developments of image sensor and the digital camera chip set including the ADC, DRAM and high-speed Cache SRAM buffer memory chips and micro controller chips. Before retiring from Sony at the end of July 2008, he was engaged in the PS2 and PS3 chip set developments. He was invited to talk at CCD1979, ECS1980, ESSCIRC2001, ESSCIRC2008 and ISSCC2013. While working at Sony until July 2008, he was serving as a visiting professor at Caltech since 1998 to 1999 in the office of Prof. C. A. Mead in Electrical Engineering department and also in the offices of Prof. T.C. McGill and Prof. James McCaldin in Applied Physics department. He was also serving as a visiting professor since 2003 till 2006 in the office of Prof. Haruo Kobayashi in Electrical Engineering department at Gunma University in Japan.
  

  In 1992 he also served as a member of JEDEC memory standardization committee and also as the IEC TC47　technical committee chair of the international standard committee (IEC). He also served as the international program chair and an operational committee member in IEEE EDS sponsored ICMTS conferences, IEEE ISSCC conferences for which he served as the ISSCC Asian Committee chair and also as the ISSCC international technical program committee (ITC) chair in series. He was also a member in the program committee (PC) and the operational committee (OC) and is now serving in the advisory committee (AC) of the IEEE Cool Chips conferences in series. He also taught from 2020 to 2021 the AIPS, Artificial Intelligent Partner System for AI robotics at Kanagawa Institute of Technology in Japan.
  

  In 2008 he founded and worked as the president of Artificial Intelligent Partner System, AIPS, a nonprofit research organization, NPO, registered by Kanagawa prefecture government in Japan. Since 2017, he is serving as an operational committee (OC) member and also as a technical program committee (PC) member of Department of Education in Society of Semiconductor Industry Specialists (SSIS) in Japan. Since 2009 till 2017, he taught graduate and undergraduate students as a full professor of Information and Communication Science department and is still now serving as a specially appointed professor at the president office in Sojo University in Kumamoto-city, Japan working for developments of semiconductor chips for AIPS robotics and Solar Cell energy solutions. He is Caltech Distinguished Alumni, IEEE Life Fellow and AAIA Fellow.

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  Gwee Bah Hwee

  Research field: Hardware Security, Hardware Assurance, Asynchronous Circuit, Machine Learning and Image Processing.

  Associate Professor, Nanyang Technological University, Singapore.

  Dr Bah-Hwee Gwee received his BEng (Hons) degree from University of Aberdeen, UK, in 1990. He received his MEng and PhD degrees from Nanyang Technological University (NTU), Singapore, in 1992 and 1998 respectively. He was an Assistant Professor in School of EEE, NTU from 1999 to 2005 and has been an Associate Professor since 2005. He had held several school administrative committee appointments including Chairman of EEE Career Guidance Committee from 2000 - 2005, Chairman of EEE Outreach Committee from 2005 - 2009, Assistant Chair (Students) EEE from 2010 - 2014 and has been the Assistant Chair (Outreach) EEE since 2017. He is the Deputy Director of National Integrated Centre for Evaluation (NiCE). Dr Gwee was the Principal Investigator (PIs) of a number of research projects including the ASEAN-European Union University Network Programme, Ministry of Education (MoE) Tier-1 and Tier-2, Defence Science Organisation, Defence Science and Technology Agency, Temasek Laboratories@NTU, A-STAR PSF, Cybersecurity Agency, National Research Foundation projects. He was also the co-PIs of DARPA (USA), NRF (SOCure), NRF (CHFA), NTU-Panasonic, NTU-Lingköping and GAP (Proof of Concept) Fund research projects. His total research grant is amounting to more than US$15m. He has filed 8 US patents in circuit design and hardware security, 5 of them have been granted by US PTO. His research interests include hardware security, hardware assurance, asynchronous circuit, machine learning and image processing. Dr Gwee was awarded Defence Technology Prize Team (R&D) category in 2016, TL@NTU Scientific Award, 2016, TL@NTU Best Publication Award in 2012 and the NTU EEE Teaching Excellence Award – Year 3 in 2013. He has co-founded 2 start-ups. Dr Gwee was the Chairman of IEEE Singapore Circuits and Systems Chapter in 2005, 2006, 2013 and 2016. He has been the members of IEEE Circuits and Systems Society (CASS) DSP, VSA and Bio-CAS Technical Committees (TC) since 2004. He was the Chairman of IEEE CASS DSP TC from 2018 - 2020. He has served in the Organizing Committees for IEEE BioCAS-2004, IEEE APCCAS-2006, Technical Program Chair for ISIC-2007, ISIC-2011, ISIC-2016 and served in the steering committee for IEEE APCCAS 2006 - 2008. He was the General Chair of IEEE DSP 2018, IEEE SOCC 2019, IEEE ISICAS 2021 and will be the General Chair of ISCAS 2024 (IEEE CAS Society flagship conference). He was the Associate Editor for IEEE CAS Magazine (from 2020 – present), IEEE Transactions on Circuits and Systems I – Regular Papers (T-CAS I) from 2012-2013 and IEEE Transactions on Circuits and Systems II – Express Brief (T-CAS II) from 2010 - 2011, from 2018 – 2019 and from 2020 – 2021. He serves in the editorial board of IEEE Circuits and Systems Magazine from 2021 – 2022 and Journal of Circuits, Systems and Signal Processing (CSSP) from 2007 - 2012. He was an IEEE Distinguished Lecturer for CAS Society from 2009 – 2010 and from 2017 - 2018. He was the keynote speaker of IEEE MCSoC 2021, IEEE PAINE 2020 and IEEE APCCAS 2020.
  
  

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  Tee Hui Teo

  Research field: Integrated Circuits, Artificial Intelligence, IC Design, Device Characterization and Modelling.

  Senior Lecturer, Singapore University of Technology and Design, Singapore.

  Tee Hui Teo graduated with Master of Engineering and Ph.D. from National University of Singapore and Nanyang Technological University in 2000 and 2009 respectively in Electrical & Electronic Engineering. Since 1996, he was with Sharp, ST-Microelectronics, Intelligent Micro-Devices (Matsushita), and etc. as a senior Integrated Circuits (IC) designer, prior to joining Institute of Microelectronics, Agency for Science, Technology and Research (A*STAR), Singapore as principal investigator in advanced IC design R&D. In 2010, he joined education sector for setting up both Analog and Digital IC design courses and laboratories for Technical University of Munich, Asia. He is currently with Singapore University of Technology and Design. T. Hui is a Senior Member of IEEE, and Fellow of IES (Institution of Engineers Singapore). He has served as General Chair of several international academic conferences, as well as Editorial Board Member and Guest Editor of several international journals.